Oxide-Trapped-Charge-Induced Gate-Diagonal Tunneling Suppression of Gate-Normal Tunnel Field-Effect Transistors
We analyze the suppression of gate-diagonal tunneling by an oxide-trapped charge in gate-normal tunneling field effect transistors (TFETs). It is observed that the gate-diagonal tunneling occurring ahead of gate-normal tunneling can be alleviated by trapping electrons in the gate insulator over the channel region. Oxide-trapped charges can be generated by process technologies or hot carrier injections. Because the trapped electrons screen the gate voltage effectively and weaken the gate controllability over the gate-diagonal tunneling region, the achieved subthreshold swing and on-current are 27-% lower and 2.89x higher than those of conventional gate-normal TFETs, respectively.
Authors
- Kyung Min Koo
- Woo Young Choi (ORCID: https://orcid.org/0000-0002-4037-4969)
- Jae Seung Woo (ORCID: https://orcid.org/0000-0003-4781-4979)
Institutions
- Seoul National University (KR)
- Sogang University (KR)
Publication Details
- Journal
- IEEE Transactions on Nanotechnology
- Published
- 2025-01-01
- DOI
- https://doi.org/10.1109/tnano.2025.3605557
- Primary Topic
- Semiconductor materials and devices
- Type
- article
- Field-Weighted Citation Impact
- 0.00