Design and Implementation of FPGA-Based Efficient Simulation Platform for Mixed-Signal Systems

Aiming at the efficiency bottleneck of traditional software simulation caused by the increasing complexity of mixed-signal (AMS) design in system-on-chip (SoC), this paper proposes a hardware-software co-simulation framework based on FPGA. The framework constructs a dynamic joint architecture of ARM processor and FPGA through the deep integration of SystemC-AMS modeling language and FPGA hardware acceleration: the PS side runs the analog circuit state equation (<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$x=A x+B u$</tex>), the PL side realizes the digital logic RTL-level acceleration, and the cross-domain data interaction is realized through the AXI4 interface (peak bandwidth of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$5.6 ~\text{GB} / \mathrm{s}$</tex>). Innovative design of weighted multipliers and time integrators with quantisation error constraints of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$&lt;0.5$</tex> LSB and dynamic dual-step synchronisation (analogue <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$10 \text{MHz} /$</tex> digital 100 MHz, synchronisation error <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$&lt;0.1 \%$</tex>). Measurements on the Xilinx ZCU102 platform show a 12.4 -fold speedup over traditional SPICE simulation, with the root-mean-square error (RMSE) reduced from 3.2 % to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{1. 8 \%}$</tex>, the logic cell utilisation <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\leq \mathbf{6 5 \%}$</tex>, and the power consumption of only 1.2 W. This study provides a high-precision, low-power, and efficient validation solution for complex AMS systems, and pushes the evolution of mixed-signal simulation to system-level co-design. This study provides an efficient verification solution for complex AMS systems with high accuracy and low power consumption, and promotes mixed-signal simulation to system-level collaborative design.