Machine Learning-Based High Vmin Prediction for Enhanced Pre-Silicon Reliability

Accurate prediction of the minimum operating voltage (Vmin) is critical for optimizing performance, power and yield in advanced semiconductor designs. Traditional approaches rely on exhaustive simulations or post-silicon characterization, which are time-consuming and expensive. This paper proposes a supervised machine learning framework to predict high Vmin values during the pre-silicon phase, enabling early detection of circuits prone to timing and power-related failures. The model leverages key features such as Intra-Die Variation (IDV), Leakage Current, Frequency, Temperature and Weighted Switching Activity (WSA) from at-speed ATPG patterns. We evaluate three regression models - Linear Regression, Random Forest and XGBoost using R<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> score, MAE and RMSE. Experimental results show XGBoost delivers the highest prediction accuracy. This predictive capability offers a valuable tool for identifying Vmin-critical instances early, improving design robustness and reducing the need for costly post-silicon debug.