Evaluating Boundary Restriction Methods Against Hardware Transient Faults on Website Fingerprinting Attacks

Boundary restriction methods are increasingly used to mitigate the impacts of transient hardware faults due to their low overhead and ease of use. Besides the typical safetycritical applications such as self-driving and health-care, the machine learning-assisted website fingerprinting (WF) attacks, which aim to infer sensitive user activities from encrypted traffic patterns, require high computational reliability. However, transient hardware faults (e.g., bit-flips) may degrade attack accuracy by distorting feature extraction. Therefore, this paper aims to enhance the robustness of website fingerprinting (WF) attack models against hardware transient faults by evaluating boundary restriction methods. Three boundary restriction methods including layer-level clipping, neuron-level smooth restrictions, and hybrid strategies are selected for mitigating fault propagation in the WF learning models. The evaluation of fault containment efficacy is through hardware-calibrated fault injection across convolutional (Conv), activation, and fully-connected (FC) layers. The experiments on interrupt-driven datasets reveal that layerlevel approaches maintain inference accuracy yet show limited fault resilience. Neuron-level methods reduce fault propagation but degrade feature extraction, with accuracy drops of 2.78 % in fault-free scenarios and nonlinear performance decay under increasing Bit Error Rates (BERs). Hybrid strategies balance these tradeoffs by selectively integrating layer-level and neuronlevel restrictions, achieving 35.3% accuracy under BER equal to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$3 \times 10^{-6}$</tex> while maintaining moderate fault-free accuracy (<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{0. 3 2 \%}$</tex> drop). The comprehensive results analysis provides design principles for integrating boundary restrictions into reliable WF attacks while harmonizing hardware reliability and algorithmic precision.