Ternary Content‐Addressable Memory Using One Capacitor and One Nanoelectromechanical Memory Switch for Data‐Intensive Applications

A novel ternary content‐addressable memory architecture using one capacitor and one nanoelectromechanical (NEM) memory switch [1C‐1N ternary content‐addressable memory (TCAM)] is proposed for energy‐efficient and high‐reliability computations in large‐scale arrays. The proposed 1C‐1N TCAM integrates a capacitor and a nonvolatile NEM memory switch monolithically on the CMOS interconnect layers, leveraging the unique high‐impedance state of NEM memory switches to enable ternary operation within a single cell. The proposed fully back‐end‐of‐line integrated TCAM cells achieve high capacitance ratios (138–1695) owing to exceptionally low air gap capacitance, facilitating robust sensing margin while minimizing dynamic energy consumption. Experimental demonstration of TCAM operation and array‐level simulations based on the measurement results confirm the feasibility and efficiency of the proposed architecture. Moreover, the proposed 1C‐1N TCAM exhibits excellent tolerance against cycle‐to‐cycle and device‐to‐device variations due to the inherent mechanical characteristics of NEM memory switches, showing significant potential for large‐scale implementation in various in‐memory computation tasks and underscoring its suitability for data‐intensive applications.