Electrical performance optimization and low‐frequency noise evaluation of In ₂ O ₃ TFT with CeAlO _<i>x</i> /Al ₂ O ₃ stacked gate dielectrics

Abstract This article reports In 2 O 3 thin‐film transistors (TFTs) that utilize a CeAlO x /Al 2 O 3 stacked gate dielectric architecture. The CeAlO x gate dielectric films were optimized by doping Al into CeO 2 , where the adjustment of the Al/Ce atomic ratio effectively suppressed oxygen‐vacancy‐related defects and optimized gate dielectric leakage current. Due to the large bandgap and high density of Al 2 O 3 prepared via atomic layer deposition (ALD), CeAlO x /Al 2 O 3 stacked gate dielectric exhibits lower leakage current compared to single‐layer CeAlO x . We systematically investigated the Al/Ce ratio’s dependence on In 2 O 3 TFT performance, identifying an optimal stoichiometry of 3:7 (Al:Ce). The CeAlO x /Al 2 O 3 ‐based In 2 O 3 TFT fabricated at this ratio achieved exceptional characteristics: higher saturation mobility (26.86 cm 2 V −1 s −1 ) and on/off current ratio (3.58 × 10 7 ), lower subthreshold swing (0.08 V decade −1 ) and interface state density (1.39 × 10 12 cm −2 ), coupled with excellent bias stress stability. By combining low‐frequency noise analysis and X‐ray photoelectron spectroscopy (XPS), we confirmed that Al doping reduces the trap density in CeO 2 while simultaneously enhancing its dielectric properties. Furthermore, a resistive‐load inverter based on In 2 O 3 TFT presents a voltage gain up to 15.1 at an applied voltage of 5 V with a typical reverse behavior, demonstrating that In 2 O 3 TFT based on CeAlO x /Al 2 O 3 stacked gate dielectric exhibits potential for application in advanced digital circuits.