Power Factor Adaptive DPWM Control Strategy for T-Type Three-Level Inverters

With the widespread application of multilevel inverters, device losses have become a critical area of research. A key limitation of conventional three-level discontinuous pulse width modulation (DPWM) strategies is their inability to maintain switching device clamping during the peak intervals of the load current, especially under varying load power factor conditions, thereby reducing switching losses. This paper proposes an improved three-level power factor adaptive DPWM (PFA-DPWM) strategy that minimizes switching losses by clamping the power devices during the one-third fundamental period of maximum load current. First, a unified mathematical model of DPWM strategies is established. Theoretical analysis demonstrates that phase disposition (PD) carrier modulation for three-level inverter exhibits superior line voltage harmonic characteristics. Based on this, a theoretical comparison of switching losses and harmonic distortion for various DPWM schemes is conducted. The proposed PFA-DPWM control strategy has the minimum switching loss without compromising harmonic performance. The efficacy and validity of the proposed strategy are confirmed by comprehensive simulation and experimental results.