Maintaining a High Electronic Quality Surface During Patterned Plasma Etching Processes for HJT-IBC Solar Cells

Recent results are shown concerning the application of a novel, contactless patterning technique to form the doped fingers required for interdigitated back contact heterojunction (HJT-IBC) crystalline silicon (c-Si) solar cells. The technique involves patterning the powered RF electrode in a custom-designed RF-PECVD chamber to locally etch regions of a thin film stack to form oppositely doped fingers. A gentle NF3 etching step and a H2 plasma treatment are effective in mitigating the surface damage during patterned etching, maintaining the initial open circuit voltage and fill factor. XPS profiling is used to show the mechanisms behind this improvement. Lastly, nanocrystalline doped layers are used in place of amorphous ones, and the superior device performance demonstrates that this process flow is compatible with values of V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OC</inf> above 700 mV.

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Published
2025-06-08
DOI
https://doi.org/10.1109/pvsc59419.2025.11132102
Primary Topic
Silicon and Solar Cell Technologies
Type
article
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article

Maintaining a High Electronic Quality Surface During Patterned Plasma Etching Processes for HJT-IBC Solar Cells

C. Patra, Mathieu Frégnaux, Erik Johnson, Kassiogé Dembélé et al.
Silicon and Solar Cell Technologies
article

Maintaining a High Electronic Quality Surface During Patterned Plasma Etching Processes for HJT-IBC Solar Cells

C. Patra, Mathieu Frégnaux, Erik Johnson, Kassiogé Dembélé, Karim Ouaras, Monalisa Ghosh, Wei Wang, Pavel Bulkin, M. Bouttemy, D. Daineka, Sergej Filonovich, Junzhuan Wang, P. Roca i Cabarrocas
article en

Abstract

Recent results are shown concerning the application of a novel, contactless patterning technique to form the doped fingers required for interdigitated back contact heterojunction (HJT-IBC) crystalline silicon (c-Si) solar cells. The technique involves patterning the powered RF electrode in a custom-designed RF-PECVD chamber to locally etch regions of a thin film stack to form oppositely doped fingers. A gentle NF3 etching step and a H2 plasma treatment are effective in mitigating the surface damage during patterned etching, maintaining the initial open circuit voltage and fill factor. XPS profiling is used to show the mechanisms behind this improvement. Lastly, nanocrystalline doped layers are used in place of amorphous ones, and the superior device performance demonstrates that this process flow is compatible with values of V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OC</inf> above 700 mV.

Total (France) (FR), Centre National de la Recherche Scientifique (FR), École Polytechnique (FR), Université de Versailles Saint-Quentin-en-Yvelines (FR), Institut Polytechnique de Paris (FR), Institut Lavoisier de Versailles (FR)
Affordable and clean energy
Openalex Percentile: Top 78%
Silicon and Solar Cell Technologies
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