Design and implementation of phased array wave speed control system based on FPGA

This study focuses on active electronically scanned arrays (AESA), where phase delay adjustments are precisely controlled using FPGAs. As the scale of AESA increases, the real-time requirements and complexity of the phase delay control system also rise. To address this, a novel beam control system with a uniformly spaced phased array has been developed. The beam can be controlled through an adaptive software program, and an 8x8 planar array control system has been constructed using a collaborative system between Matlab and FPGA. The system calculates beam pointing angle parameters using Matlab, implements a gigabit Ethernet architecture based on FPGA, and employs Ethernet for high-speed transmission of phase control data. Combined with ping-pong buffering processing, this approach achieves high-precision real-time control of phased array antenna beam switching.

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Publication Details

Published
2025-08-28
DOI
https://doi.org/10.1117/12.3077106
Primary Topic
Antenna Design and Optimization
Type
article
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article

Design and implementation of phased array wave speed control system based on FPGA

Rui Tang, Ying Zhan, Shihai Gan
Antenna Design and Optimization
article

Design and implementation of phased array wave speed control system based on FPGA

Rui Tang, Ying Zhan, Shihai Gan
article en

Abstract

This study focuses on active electronically scanned arrays (AESA), where phase delay adjustments are precisely controlled using FPGAs. As the scale of AESA increases, the real-time requirements and complexity of the phase delay control system also rise. To address this, a novel beam control system with a uniformly spaced phased array has been developed. The beam can be controlled through an adaptive software program, and an 8x8 planar array control system has been constructed using a collaborative system between Matlab and FPGA. The system calculates beam pointing angle parameters using Matlab, implements a gigabit Ethernet architecture based on FPGA, and employs Ethernet for high-speed transmission of phase control data. Combined with ping-pong buffering processing, this approach achieves high-precision real-time control of phased array antenna beam switching.

Inner Mongolia University (CN)
Openalex Percentile: Top 69%
Antenna Design and Optimization
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