An analog ReLu-based decision tree circuit architecture for biomedical applications

Abstract This paper presents a low-power and high performance decision tree classifier for biomedical applications. The proposed architecture consists of Current Comparator circuits, ReLu circuits, Gaussian function circuits, analog multipliers, Current Mirrors and argmax operator. All the circuits operate in the sub-threshold region in order to achieve power-efficiency. The principles of the architecture are thoroughly described and realized in an energy-efficient set-up that consumes less than 956 nW and operates on low supply rails of 0.6 V. When tested on real-world biomedical classification tasks, the proposed design achieved a classification accuracy exceeding $$91.30\%$$ . The Cadence IC Suite was used for the schematic design and layout, and the implementation was carried out using 90 nm CMOS technology. The robustness of the classifier was evaluated through corner-case analysis and Monte Carlo simulations, accounting for process variations and mismatches. The accuracy and reliable performance of the proposed architecture were confirmed by comparing post-layout simulation results with those of a software-based classifier and relevant prior studies.

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Publication Details

Journal
Analog Integrated Circuits and Signal Processing
Published
2025-08-28
DOI
https://doi.org/10.1007/s10470-025-02481-2
Citations
1
Primary Topic
Neural Networks and Applications
Type
article
Field-Weighted Citation Impact
2.48

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article

An analog ReLu-based decision tree circuit architecture for biomedical applications

Paul P. Sotiriadis, Vassilis Alimisis, Vasileios Moustakas, Konstantinos Cheliotis et al.
1 citations
Analog Integrated Circuits and Signal Processing
Neural Networks and Applications
2.48
article

An analog ReLu-based decision tree circuit architecture for biomedical applications

Paul P. Sotiriadis, Vassilis Alimisis, Vasileios Moustakas, Konstantinos Cheliotis, Anna Mylona
article en
1 citations

Abstract

Abstract This paper presents a low-power and high performance decision tree classifier for biomedical applications. The proposed architecture consists of Current Comparator circuits, ReLu circuits, Gaussian function circuits, analog multipliers, Current Mirrors and argmax operator. All the circuits operate in the sub-threshold region in order to achieve power-efficiency. The principles of the architecture are thoroughly described and realized in an energy-efficient set-up that consumes less than 956 nW and operates on low supply rails of 0.6 V. When tested on real-world biomedical classification tasks, the proposed design achieved a classification accuracy exceeding $$91.30\%$$ . The Cadence IC Suite was used for the schematic design and layout, and the implementation was carried out using 90 nm CMOS technology. The robustness of the classifier was evaluated through corner-case analysis and Monte Carlo simulations, accounting for process variations and mismatches. The accuracy and reliable performance of the proposed architecture were confirmed by comparing post-layout simulation results with those of a software-based classifier and relevant prior studies.

Analog Integrated Circuits and Signal ProcessingVol. 125(1)
National Technical University of Athens (GR), Athena Research and Innovation Center In Information Communication & Knowledge Technologies (GR)
European Commission
Openalex Percentile: Top 9%
Neural Networks and Applications
2.48
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An analog ReLu-based decision tree circuit architecture for biomedical applications — Paul P. Sotiriadis, Vassilis Alimisis, et al. · Analog Integrated Circuits and Signal Processing (2025) | TGRS Research Map | TGRS