Cross-Layer Design and Design Automation for In-Memory Computing Based on Nonvolatile Memory Technologies
Data transfer between processors and memory remains a critical bottleneck in improving application performance on traditional computing hardware, particularly for data-intensive workloads such as machine learning, bioinformatics, and security applications. In-memory computing (IMC), a paradigm where a substantial portion of data processing occurs directly within memory, has emerged as a promising solution to mitigate this bottleneck. The advancement of emerging non-volatile memory (NVM) technologies has further accelerated the development of IMC hardware fabrics. However, harnessing the full potential of IMC requires a cross-layer design approach that spans memory technologies, circuits, architectures, and systems. Essential cross-layer tools—including modeling and simulation, data partitioning and mapping, and operation scheduling—play a pivotal role in designing efficient IMC-based hardware. This article reviews key advancements in simulation and design tools for IMC fabrics, with a focus on NVM-based crossbar arrays and content-addressable memories, while highlighting the necessity of cross-layer collaboration. Additionally, we discuss current challenges and emerging opportunities in the field.
Authors
- Michael Niemier (ORCID: https://orcid.org/0000-0001-7776-4306)
- João Paulo C. de Lima (ORCID: https://orcid.org/0000-0001-9295-3519)
- Jerónimo Castrillón (ORCID: https://orcid.org/0000-0002-5007-445X)
- Yu Wang (ORCID: https://orcid.org/0000-0002-2931-8958)
- Liu Liu (ORCID: https://orcid.org/0000-0003-3307-1596)
- Xiaobo Sharon Hu (ORCID: https://orcid.org/0000-0002-6636-9738)
- Minah Lee (ORCID: https://orcid.org/0000-0002-3800-802X)
- Zhenhua Zhu (ORCID: https://orcid.org/0009-0007-9259-7180)
- Mengyuan Li (ORCID: https://orcid.org/0000-0002-6322-9908)
Institutions
- University of Notre Dame (US)
- Georgia Institute of Technology (US)
- Technische Universität Dresden (DE)
- Tsinghua University (CN)
Publication Details
- Journal
- IEEE Design and Test
- Published
- 2025-08-28
- DOI
- https://doi.org/10.1109/mdat.2025.3603495
- Citations
- 1
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.73
Funders
- Semiconductor Research Corporation