Real-Time Optimization Strategy to Minimize Switching Losses for Three-Level NPC Inverter

This paper proposes a real-time optimization strategy, aimed at minimizing switching losses in a three-level neutral-point-clamped (3L-NPC) inverter. The proposed strategy consists of optimized clamping strategy and unified triangular carrier based discontinuous pulse width modulation (DPWM) strategy. In each control period, the optimized clamping strategy determines optimal clamped phases and voltage levels to clamp the phase with absolute current as big as possible. Based on obtained optimal results, unified triangular carrier based DPWM strategy calculates the injected common mode voltage (CMV) and generates driving signals for semiconductor switching devices by comparing final modulation signals and two phase-deposited carriers. Analysis and experiment results show the proposed strategy not only can reduce switching losses up to 49.8% compared with conventional space vector PWM (SVPWM) but also has features of low computation burden and easy implementation.

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Publication Details

Journal
CSEE Journal of Power and Energy Systems
Published
2025-01-01
DOI
https://doi.org/10.17775/cseejpes.2021.05670
Citations
2
Primary Topic
Multilevel Inverters and Converters
Type
article
Field-Weighted Citation Impact
0.73
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article

Real-Time Optimization Strategy to Minimize Switching Losses for Three-Level NPC Inverter

2 citations
CSEE Journal of Power and Energy Systems
Multilevel Inverters and Converters
0.73
article

Real-Time Optimization Strategy to Minimize Switching Losses for Three-Level NPC Inverter

article en
2 citations

Abstract

This paper proposes a real-time optimization strategy, aimed at minimizing switching losses in a three-level neutral-point-clamped (3L-NPC) inverter. The proposed strategy consists of optimized clamping strategy and unified triangular carrier based discontinuous pulse width modulation (DPWM) strategy. In each control period, the optimized clamping strategy determines optimal clamped phases and voltage levels to clamp the phase with absolute current as big as possible. Based on obtained optimal results, unified triangular carrier based DPWM strategy calculates the injected common mode voltage (CMV) and generates driving signals for semiconductor switching devices by comparing final modulation signals and two phase-deposited carriers. Analysis and experiment results show the proposed strategy not only can reduce switching losses up to 49.8% compared with conventional space vector PWM (SVPWM) but also has features of low computation burden and easy implementation.

CSEE Journal of Power and Energy Systems
University of Electronic Science and Technology of China (CN), Southeast University (CN), Aalborg University (DK)
Affordable and clean energy
Openalex Percentile: Top 24%
Multilevel Inverters and Converters
0.73
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Real-Time Optimization Strategy to Minimize Switching Losses for Three-Level NPC Inverter · CSEE Journal of Power and Energy Systems (2025) | TGRS Research Map | TGRS