A Wideband D-Band Frequency Sextupler Chain with High Harmonic Rejection in 100 nm GaAs pHEMT Technology

This paper presents a wideband D-band frequency sextupler chain implemented in a 100 nm GaAs pHEMT process. The proposed circuit comprises an input-stage frequency tripler, an inter-stage harmonic-rejection power amplifier, and an output-stage frequency doubler. The tripler adopts a balanced topology, which effectively suppresses the fundamental frequency component. The inter-stage power amplifier not only delivers sufficient drive power to the doubler but also enhances suppression of undesired harmonics. The output doubler employs a single-balanced configuration to suppress odd-order harmonics while extracting the second harmonic. The measured peak output power of the sextupler chain is 2.33 dBm, corresponding to an input power of 2 dBm, resulting in a conversion gain of 0.33 dB. The 3 dB output bandwidth spans from 126.3 to 152.7 GHz, corresponding to a relative bandwidth of 18.9%. Owing to the balanced multiplier topology and harmonic-rejection PA, the 5th and 7th harmonics are suppressed by more than 20 dBc. The combination of high output power, wide operating bandwidth, and excellent harmonic suppression makes the design well suited for wideband D-band signal generation in diverse applications.

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Publication Details

Journal
Micromachines
Published
2025-08-27
DOI
https://doi.org/10.3390/mi16090984
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
Field-Weighted Citation Impact
0.00

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article

A Wideband D-Band Frequency Sextupler Chain with High Harmonic Rejection in 100 nm GaAs pHEMT Technology

P. X. Wang, Zhe Chen, Yubin Guo, Yue Qi et al.
Micromachines
Radio Frequency Integrated Circuit Design
article

A Wideband D-Band Frequency Sextupler Chain with High Harmonic Rejection in 100 nm GaAs pHEMT Technology

P. X. Wang, Zhe Chen, Yubin Guo, Yue Qi, Peng Yang
article en

Abstract

This paper presents a wideband D-band frequency sextupler chain implemented in a 100 nm GaAs pHEMT process. The proposed circuit comprises an input-stage frequency tripler, an inter-stage harmonic-rejection power amplifier, and an output-stage frequency doubler. The tripler adopts a balanced topology, which effectively suppresses the fundamental frequency component. The inter-stage power amplifier not only delivers sufficient drive power to the doubler but also enhances suppression of undesired harmonics. The output doubler employs a single-balanced configuration to suppress odd-order harmonics while extracting the second harmonic. The measured peak output power of the sextupler chain is 2.33 dBm, corresponding to an input power of 2 dBm, resulting in a conversion gain of 0.33 dB. The 3 dB output bandwidth spans from 126.3 to 152.7 GHz, corresponding to a relative bandwidth of 18.9%. Owing to the balanced multiplier topology and harmonic-rejection PA, the 5th and 7th harmonics are suppressed by more than 20 dBc. The combination of high output power, wide operating bandwidth, and excellent harmonic suppression makes the design well suited for wideband D-band signal generation in diverse applications.

MicromachinesVol. 16(9)
State Key Laboratory of Millimeter Waves, Southeast University (CN)
National Natural Science Foundation of China, Fundamental Research Funds for the Central Universities
Openalex Percentile: Top 78%
Radio Frequency Integrated Circuit Design
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A Wideband D-Band Frequency Sextupler Chain with High Harmonic Rejection in 100 nm GaAs pHEMT Technology — P. X. Wang, Zhe Chen, et al. · Micromachines (2025) | TGRS Research Map | TGRS