Low-Power Wide-Range Time-to-Digital Converter for Time-of-Flight Range Finders

Time-to-digital Converters (TDCs) are increasingly considered to offer low complexity and scaling-friendly implementations in embedded applications, replacing voltage-domain analog-to-digital converters (ADCs). Hence, TDCs have been popular in embedded and typically resource-constrained sensing applications such as Time-of-Flight (ToF) or Lidar range finders, to convert time-domain data (travel time) into digital data. Yet, TDCs can suffer from relatively high power dissipation and a large footprint when a wide dynamic range and high resolution are required, which is the case for ToF applications. To tackle these challenges, this paper presents a power and area-efficient TDC architecture, with direct application in ToF measurements. The proposed architecture is based on a Nutt topology, offering a wide dynamic range up to 1.6 ms. In addition, the architecture is made event-based by utilizing gated ring oscillator GRO based TDCs, dissipating power only for a short duration in specific measurement windows. As a result, power dissipation is significantly reduced compared to state-of-the-art implementations (up to 55x). The proposed TDC has been implemented in 65-nm CMOS technology. It occupies only 100 μm ×340 μm including integrated serializers. It features a scaling-friendly implementation with all-digital control and readout circuits, opening the path for easier integration in embedded sensing scenarios.