Investigation on Warpage Characteristics for Ultralarge MCM FCBGA Package Based on Material-Structure Codesign and Intelligent Optimization

The increased demand for computing power in artificial intelligence (AI) and high-performance computing (HPC) has led to significant advances in multi-chip integration and large-scale packaging methodologies. This has led to the emergence of multi-chip module (MCM) packaging as a prominent technological approach. However, the coefficient of thermal expansion (CTE) mismatch between the silicon die and organic substrate leads to increased warpage, which in turn causes process and reliability issues such as bump bridging, non-wetting, and solder ball cracking. As a result, warpage control has become a key issue for such products. This study proposes a warpage control method combining material-structure co-design and hybrid intelligent optimization. A 4-die 102 mm × 102 mm flip-chip ball grid array (FCBGA) package simulation model, validated by shadow moiré experiments, achieves ≤ 7.4% prediction error. Warpage exhibits a non-uniform wavy pattern influenced by die layout, with key factors including die space, substrate CTE, stiffener ring CTE, ring foot width and thickness. A custom response surface methodology (RSM) accurately models nonlinear coupling effects, while a hybrid NSGA-II and PSO algorithm optimizes warpage. Full-parameter optimization reduces warpage at 30 °C by 33.5% (138.5 μm) and at 245 °C by 88.3% (28.6 μm), while only stiffener ring optimization delivers even greater improvement at 30 °C with a 50.9% reduction (102.2 μm) along with a 32.2% decrease (166.4 μm) at 245 °C. The proposed approach offers a novel insight and an effective strategy for large-scale MCM package warpage control.