A Novel SiGe Nanosheet Transistor With Channel Release Stopping Layer Structure for Process Variations Suppression and Circuit Performance Improvement

In this study, SiGe channel nanosheet field-effect transistor (NSFET) with a novel channel release stopping layer (CRSL), namely CRSL-SiGe NSFET, is proposed to addresses the issue of sub-fin recess during channel release in conventional SiGe (C-SiGe) NSFET. Through a three-dimensional technology computer-aided design (TCAD) simulations, we systematically compare the DC and AC electrical characteristics of C-SiGe and CRSL-SiGe NSFETs. The results show that the proposed CRSL-SiGe NSFET achieves a 16% reduction in gate capacitance (C<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GG</sub>) while maintaining a comparable DC performance to C-SiGe NSFET. Additionally, an obvious improvement in gain of the inverter is achieved under various power. Moreover, the oscillation frequency of ring oscillators is increased and their delay is reduced under various power. These results indicate that CRSL-SiGe NSFET is a promising candidate for suppressing process variations and improving circuit performance in the advanced technology node.

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Publication Details

Journal
IEEE Access
Published
2025-01-01
DOI
https://doi.org/10.1109/access.2025.3602811
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.00

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article

A Novel SiGe Nanosheet Transistor With Channel Release Stopping Layer Structure for Process Variations Suppression and Circuit Performance Improvement

Yan Li, Yongliang Li, Haoyan Liu, Jiayi Zhang
IEEE Access
Advancements in Semiconductor Devices and Circuit Design
article

A Novel SiGe Nanosheet Transistor With Channel Release Stopping Layer Structure for Process Variations Suppression and Circuit Performance Improvement

Yan Li, Yongliang Li, Haoyan Liu, Jiayi Zhang
article en

Abstract

In this study, SiGe channel nanosheet field-effect transistor (NSFET) with a novel channel release stopping layer (CRSL), namely CRSL-SiGe NSFET, is proposed to addresses the issue of sub-fin recess during channel release in conventional SiGe (C-SiGe) NSFET. Through a three-dimensional technology computer-aided design (TCAD) simulations, we systematically compare the DC and AC electrical characteristics of C-SiGe and CRSL-SiGe NSFETs. The results show that the proposed CRSL-SiGe NSFET achieves a 16% reduction in gate capacitance (C<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GG</sub>) while maintaining a comparable DC performance to C-SiGe NSFET. Additionally, an obvious improvement in gain of the inverter is achieved under various power. Moreover, the oscillation frequency of ring oscillators is increased and their delay is reduced under various power. These results indicate that CRSL-SiGe NSFET is a promising candidate for suppressing process variations and improving circuit performance in the advanced technology node.

IEEE AccessVol. 13
Chinese Academy of Sciences (CN), Beijing Information Science & Technology University (CN)
National Natural Science Foundation of China
Affordable and clean energy
Openalex Percentile: Top 79%
Advancements in Semiconductor Devices and Circuit Design
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A Novel SiGe Nanosheet Transistor With Channel Release Stopping Layer Structure for Process Variations Suppression and Circuit Performance Improvement — Yan Li, Yongliang Li, et al. · IEEE Access (2025) | TGRS Research Map | TGRS