A Cryo-Tolerant >40-dB IRR, 4.7–7.9-GHz Double Quadrature Cryo-CMOS Receiver With a Broadband LNA for Scalable Quantum Applications

This article presents a cryogenic CMOS receiver operating across 4.7–7.9 GHz for frequency-division multiplexing (FDM) quantum state readout. The designed receiver employs a double quadrature (DQ) architecture and a hybrid poly-phase filter (PPF) is proposed to achieve an impressive image rejection ratio (IRR) to meet the 99.99% higher fidelity requirements in quantum error correction (QEC). In addition, gain tuning at different stages of the low noise amplifier (LNA) facilitates a broadband gain and flatness, while the subsequent receiver chains of a broadband mixer and an improved four-input intermediate frequency amplifier (IF-AMP) provide further gain compensation. Fabricated with a standard 55-nm CMOS technology, the LNA achieves a measured power gain of 27.4 dB, with a −3-dB bandwidth (BW) of 5.2 GHz at 6 K. The measured cryogenic noise figure (NF) ranges from 0.79 to 1 dB consuming merely 5.5 mW from a 1.2-V supply. Overall receiver measurements demonstrate a peak gain of 48.2 dB, a −5-dB flatness of 3.2 GHz, and an IRR that exceeds 40 dB at 6 K. These results demonstrate the receiver’s capacity for high-fidelity qubits’ state readout.

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Publication Details

Journal
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Published
2025-08-26
DOI
https://doi.org/10.1109/tvlsi.2025.3600894
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
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article

A Cryo-Tolerant >40-dB IRR, 4.7–7.9-GHz Double Quadrature Cryo-CMOS Receiver With a Broadband LNA for Scalable Quantum Applications

Chenglong Liang, Youze Xin, R.R. Liang, Li Geng et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Radio Frequency Integrated Circuit Design
article

A Cryo-Tolerant >40-dB IRR, 4.7–7.9-GHz Double Quadrature Cryo-CMOS Receiver With a Broadband LNA for Scalable Quantum Applications

Chenglong Liang, Youze Xin, R.R. Liang, Li Geng, Bingjun Tang, Ya Zhao, Bing Zhang, Shuyou Gan, Zixun Gao, Xingguo Dong
article en

Abstract

This article presents a cryogenic CMOS receiver operating across 4.7–7.9 GHz for frequency-division multiplexing (FDM) quantum state readout. The designed receiver employs a double quadrature (DQ) architecture and a hybrid poly-phase filter (PPF) is proposed to achieve an impressive image rejection ratio (IRR) to meet the 99.99% higher fidelity requirements in quantum error correction (QEC). In addition, gain tuning at different stages of the low noise amplifier (LNA) facilitates a broadband gain and flatness, while the subsequent receiver chains of a broadband mixer and an improved four-input intermediate frequency amplifier (IF-AMP) provide further gain compensation. Fabricated with a standard 55-nm CMOS technology, the LNA achieves a measured power gain of 27.4 dB, with a −3-dB bandwidth (BW) of 5.2 GHz at 6 K. The measured cryogenic noise figure (NF) ranges from 0.79 to 1 dB consuming merely 5.5 mW from a 1.2-V supply. Overall receiver measurements demonstrate a peak gain of 48.2 dB, a −5-dB flatness of 3.2 GHz, and an IRR that exceeds 40 dB at 6 K. These results demonstrate the receiver’s capacity for high-fidelity qubits’ state readout.

IEEE Transactions on Very Large Scale Integration (VLSI) SystemsVol. 34(1)
Xi'an Jiaotong University (CN)
National Natural Science Foundation of China
Affordable and clean energy
Openalex Percentile: Top 79%
Radio Frequency Integrated Circuit Design
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