Scalable Demonstration of Negligible Hysteresis of Single‐Walled Carbon Nanotube Field‐Effect Transistors via Dual‐Stacked Gate Dielectrics for Micro‐Light‐Emitting Diode Display Application

The growing demand for augmented and virtual reality systems accelerates the need for high‐resolution, low‐power display technologies. Micro‐light‐emitting diodes (micro‐LEDs) are well suited for this purpose, yet their integration requires high‐performance thin‐film transistors (TFTs) that can deliver sufficient current in compact, low‐temperature environments—conditions where conventional a‐Si and LTPS TFTs fall short. Single‐walled carbon nanotube (SWNT)‐based field‐effect transistors (FETs) offer high mobility, mechanical flexibility, and compatibility with low‐temperature processing, making them attractive for next‐generation display drivers. However, gate‐induced hysteresis—primarily from hydroxyl group‐related charge trapping—remains a critical barrier. Herein, purified SWNT TFTs are implemented in a scalable manner with negligible hysteresis and their application in logic circuits is demonstrated. Logic gates including inverters, NAND, and NOR circuits exhibit reliable switching behavior, with a bootstrap‐capacitor inverter achieving a high voltage gain of ≈4.3 at V DD = 4 V. Additionally, micro‐LED driving capability is demonstrated using the proposed SWNT FETs and inverters, enabling precise analog control and robust on/off modulation of RGB μ‐LEDs under AC switching. These results underscore the strong potential of the spin‐on glass/HfO 2 ‐based SWNT FET platform for scalable, low‐power integration in next‐generation display driver circuits and flexible logic systems.