Exploring CXL-SSD Challenges on Cache Underutilization

The CXL interface enhances scalability for memory expansion, which is crucial for the demands of emerging memory-intensive applications. However, mismatches between traditional memory hierarchies and CXL- enabled memory, particularly when using SSDs as memory space, present critical issues that have not previously been addressed. This paper investigates the deployment of CXL technology in SSDs and the associated data management challenges that differ from those in traditional memory systems. We explore the potential issues of utilizing SSDs as system memory via CXL interfaces, emphasizing the substantial performance bottlenecks caused by by-passing traditional DRAM caching, which leads to CPU resource contention, unintended adverse effects on DRAM, and inefficiencies in SSD access. Based on our findings, we propose improvements to mitigate such challenges by optimizing memory management strategies and system architecture implementations to leverage CXL-enabled SSDs’ capabilities fully.

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Publication Details

Journal
JSTS Journal of Semiconductor Technology and Science
Published
2025-08-26
DOI
https://doi.org/10.5573/jsts.2025.25.4.459
Primary Topic
Advanced Data Storage Technologies
Type
article
Field-Weighted Citation Impact
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article

Exploring CXL-SSD Challenges on Cache Underutilization

Won Woo Ro, Hoon-Hwi Lee, Minjae Kim, Jun-Woo You et al.
JSTS Journal of Semiconductor Technology and Science
Advanced Data Storage Technologies
article

Exploring CXL-SSD Challenges on Cache Underutilization

Won Woo Ro, Hoon-Hwi Lee, Minjae Kim, Jun-Woo You, Hyung-Jun Jang
article en

Abstract

The CXL interface enhances scalability for memory expansion, which is crucial for the demands of emerging memory-intensive applications. However, mismatches between traditional memory hierarchies and CXL- enabled memory, particularly when using SSDs as memory space, present critical issues that have not previously been addressed. This paper investigates the deployment of CXL technology in SSDs and the associated data management challenges that differ from those in traditional memory systems. We explore the potential issues of utilizing SSDs as system memory via CXL interfaces, emphasizing the substantial performance bottlenecks caused by by-passing traditional DRAM caching, which leads to CPU resource contention, unintended adverse effects on DRAM, and inefficiencies in SSD access. Based on our findings, we propose improvements to mitigate such challenges by optimizing memory management strategies and system architecture implementations to leverage CXL-enabled SSDs’ capabilities fully.

JSTS Journal of Semiconductor Technology and ScienceVol. 25(4)
Openalex Percentile: Top 75%
Advanced Data Storage Technologies
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Exploring CXL-SSD Challenges on Cache Underutilization — Won Woo Ro, Hoon-Hwi Lee, et al. · JSTS Journal of Semiconductor Technology and Science (2025) | TGRS Research Map | TGRS