A Novel Phase Detector for High-Performance Single-Phase PLLs

Accurate and fast detection of the grid voltage phase angle is a critical requirement for grid-connected inverters, as it ensures the correct generation of reference signals and stable operation. This paper proposes a new singlephase phase-locked loop (PLL) circuit designed to overcome the limitations of conventional methods. The proposed PLL incorporates a novel phase detection mechanism that eliminates the need for low-pass filters and addresses issues related to oscillatory behavior. As a result, the proposed method provides a simplified structure and a straightforward control law formulation. Unlike conventional approaches that rely on the product of the measured and estimated voltages to generate an error signal (requiring low-pass filtering) the proposed method uses the absolute value of the error signal, which is derived from the difference between the measured and estimated voltages. This approach significantly reduces complexity while improving overall performance. The effectiveness of the proposed PLL is validated through extensive numerical simulations and experimental tests under various grid conditions, such as voltage sags, phase jumps, and frequency steps. The results demonstrate that the proposed PLL achieves zero steady-state error across all operating scenarios. Additionally, the dynamic response time is minimal, making it highly suitable for industrial applications.