Gate Tunable Retention in Optoelectronic Synapses Using Oxide Semiconductor Thin Film Transistors

In this work we propose a biasing scheme to modulate the retention behavior of oxide semiconductor based optoelectronic synapses. The method has been demonstrated using a zinc oxide thin film transistor, which exhibits persistent photoconductivity to UV light. The application of a negative gate bias prevents the recombination of photo-generated carriers, leading to negligible decay in the post synaptic current and consequently, the retention time could extend beyond <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$10^{5}$</tex-math></inline-formula>s. The improvement in memory retention is observed in various synaptic functions such as short-term memory, long-term memory, duration-time-dependent plasticity and paired pulse facilitation. A five fold improvement in the % decay of post synaptic current was observed at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$V_{gs}$</tex-math></inline-formula> =-5V, when compared to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$V_{gs}$</tex-math></inline-formula> =+5V. Furthermore, we have assessed the impact of these improved retention properties on the performance of an artificial neural network, designed for pattern recognition of MNIST handwritten digits. The accuracy decayed drastically with time from 96% to nearly 40% at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$V_{gs}$</tex-math></inline-formula> = +5V whereas it drops to only 94% at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$V_{gs}$</tex-math></inline-formula> =-5V.