Synchronized SVPWM Scheme with Optimized Overmodulation for Three-Level NPC Inverters with Low Switching Frequency

Three-level Neutral-Point-Clamped (NPC) voltage source inverters (VSIs) have been widely used in application of medium-voltage high-power induction motor drives. Due to the limitation of a switching frequency of several hundred Hz in the high-power drive application, a 4-segment synchronized SVPWM scheme is adopted to reduce output current ripple. However, in the overmodulation region, the 4-segment synchronized SVPWM scheme shows high computation complexity and high current THD. Thus, this paper presents an optimized 4-segment synchronized overmodulation scheme with the advantages of low current harmonics and simple digital realization. Optimized and conventional 4-segment synchronized SVPWM schemes are compared and verified in experimental tests. Experimental results prove the proposed scheme can achieve lower current harmonics and computational burden in the overmodulation region, compared with traditional schemes.