Persistent Memory Logic Loop (PMLL) Architecture: Memory Footprint Reduction in Large Language Models

Large-scale Transformer-based language models (LLMs) such as GPT-3 and GPT-4 require substantial memory resources, with GPT-3's 175 billion parameters demanding approximately 356 GB at 16-bit precision. This memory burden stems from dense weight matri

Authors

Institutions

Publication Details

Published
2025-08-25
DOI
https://doi.org/10.36227/techrxiv.175613226.63459477/v1
Primary Topic
Topic Modeling
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Persistent Memory Logic Loop (PMLL) Architecture: Memory Footprint Reduction in Large Language Models

J. Edwards
1 links
Topic Modeling
article

Persistent Memory Logic Loop (PMLL) Architecture: Memory Footprint Reduction in Large Language Models

J. Edwards
article en

Abstract

Large-scale Transformer-based language models (LLMs) such as GPT-3 and GPT-4 require substantial memory resources, with GPT-3's 175 billion parameters demanding approximately 356 GB at 16-bit precision. This memory burden stems from dense weight matri

EarthTech International (United States) (US)
Openalex Percentile: Top 89%
Topic Modeling
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.

Persistent Memory Logic Loop (PMLL) Architecture: Memory Footprint Reduction in Large Language Models — J. Edwards · (2025) | TGRS Research Map | TGRS