Programmable Photonic Chips as Versatile Physical Unclonable Functions

Advancements in integrated photonic technology are making it feasible to construct dense, complex photonic circuits, tailored for multiple high-end applications. These circuits are now evolving into programmable platforms which offer enhanced functionalities in optical communications, computing and microwave photonics [1]. Up to date, the use of programmable photonic chips for security applications has been largely unexplored. One of the most promising embodiments of physical layer security are physical unclonable functions (PUFs). PUFs can provide on-demand generation of unpredictable responses through interrogation of a unique and complex property of a physical system. Very recently, we numerically demonstrated a photonic integrated PUF that offers device authentication and neuromorphic processing at the same time [2]. In this paper, we experimentally investigate a similar photonic PUF using a reconfigurable photonic integrated chip fabricated by Leti, consisting of 120 phase-tunable programmable unit cells (PUCs) arranged in hexagonal meshes. Fig. 1a depicts the physical manifestation of the PUF that is the voltages required to tune the phase shift of each PUC to a predefined transmission state (bar-cross). The voltage (phase-bias) follows a random almost uniform distribution rendering it unpredictable. The voltage variation is attributed to the uncontrollable, non-replicable waveguide roughness that in turn lead to random effective index variations. Thus, each PUC's response can contribute to formulating a complex cumulative nonlinear response through interference, manifested as the recorded optical spectrum when the PUF is fed with broadband noise. The PUF's challenge is the voltage applied to each PUC. The experimental scheme and the basic PUF concept is presented in Fig. 1b. The optical input is a 10 nm bandwidth limited amplified spontaneous emission noise coming from erbium doped fiber amplifier, while the output is recorded with the help of a high-resolution optical spectrum analyzer. The integrated photonic chip is controlled (challenged) by a dedicated FPGA.