Low-Frequency Noise Characteristics of Graphene/h-BN/Si Junctions

Graphene/h-BN/Si heterostructures show considerable potential for future use in infrared detection and photovoltaic technologies due to their adjustable electrical behavior and well-matched interfacial structure. The near-lattice match between graphene and hexagonal boron nitride (h-BN) enables the deposition of low-defect-density graphene on h-BN surfaces. This study presents a thorough exploration of the low-frequency electrical noise behavior of graphene/h-BN/Si heterojunctions under both forward and reverse bias conditions at room temperature. Graphene nanolayers were directly grown on h-BN films using microwave plasma-enhanced CVD. The h-BN layers were formed by reactive high-power impulse magnetron sputtering (HIPIMS). Four h-BN thicknesses were examined: 1 nm, 3 nm, 5 nm, and 15 nm. A reference graphene/Si junction (without h-BN) prepared under identical synthesis conditions was also studied for comparison. Low-frequency noise analysis enabled the identification of dominant charge transport mechanisms in the different device structures. Our results demonstrate that grain boundaries act as dominant defects contributing to increased noise intensity under high forward bias. Statistical analysis of voltage noise spectral density across multiple samples, supported by Raman spectroscopy, reveals that hydrogen-related defects significantly contribute to 1/f noise in the linear region of the junction’s current–voltage characteristics. This study provides the first in-depth insight into the impact of h-BN interlayers on low-frequency noise in graphene/Si heterojunctions.

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Publication Details

Journal
Crystals
Published
2025-08-22
DOI
https://doi.org/10.3390/cryst15090747
Citations
3
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
Type
article
Field-Weighted Citation Impact
2.19

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article

Low-Frequency Noise Characteristics of Graphene/h-BN/Si Junctions

Andrius Vasiliauskas, Justinas Glemža, Jonas Matukas, Rimantas Gudaitis et al.
3 citations
Crystals
Integrated Circuits and Semiconductor Failure Analysis
2.19
article

Low-Frequency Noise Characteristics of Graphene/h-BN/Si Junctions

Andrius Vasiliauskas, Justinas Glemža, Jonas Matukas, Rimantas Gudaitis, Šarūnas Meškinis, Šarūnas Jankauskas, Ingrida Pliaterytė
article en
3 citations

Abstract

Graphene/h-BN/Si heterostructures show considerable potential for future use in infrared detection and photovoltaic technologies due to their adjustable electrical behavior and well-matched interfacial structure. The near-lattice match between graphene and hexagonal boron nitride (h-BN) enables the deposition of low-defect-density graphene on h-BN surfaces. This study presents a thorough exploration of the low-frequency electrical noise behavior of graphene/h-BN/Si heterojunctions under both forward and reverse bias conditions at room temperature. Graphene nanolayers were directly grown on h-BN films using microwave plasma-enhanced CVD. The h-BN layers were formed by reactive high-power impulse magnetron sputtering (HIPIMS). Four h-BN thicknesses were examined: 1 nm, 3 nm, 5 nm, and 15 nm. A reference graphene/Si junction (without h-BN) prepared under identical synthesis conditions was also studied for comparison. Low-frequency noise analysis enabled the identification of dominant charge transport mechanisms in the different device structures. Our results demonstrate that grain boundaries act as dominant defects contributing to increased noise intensity under high forward bias. Statistical analysis of voltage noise spectral density across multiple samples, supported by Raman spectroscopy, reveals that hydrogen-related defects significantly contribute to 1/f noise in the linear region of the junction’s current–voltage characteristics. This study provides the first in-depth insight into the impact of h-BN interlayers on low-frequency noise in graphene/Si heterojunctions.

CrystalsVol. 15(9)
Kaunas University of Technology (LT), Vilnius University (LT)
Lietuvos Mokslo Taryba
Openalex Percentile: Top 11%
Integrated Circuits and Semiconductor Failure Analysis
2.19
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