Design of a DDR Controller Performance Test Platform Based on FPGA and SD Card

This paper proposes a DDR controller performance test platform based on FPGA and SD card. The platform utilizes the SD card as a storage medium to store the test stimuli, providing a flexible and convenient tool for the performance analysis and optimization of the DDR controller. The experimental results show that the designed test platform can accurately and effectively evaluate the performance of the DDR controller, and the test results can provide a valuable reference basis for the optimization and improvement of the DDR controller.

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Publication Details

Published
2024-12-06
DOI
https://doi.org/10.1109/iaecst64597.2024.11117705
Primary Topic
Embedded Systems and FPGA Design
Type
article
Field-Weighted Citation Impact
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article

Design of a DDR Controller Performance Test Platform Based on FPGA and SD Card

Jie Zou, Wang Peng, Xueming Hua
Embedded Systems and FPGA Design
article

Design of a DDR Controller Performance Test Platform Based on FPGA and SD Card

Jie Zou, Wang Peng, Xueming Hua
article en

Abstract

This paper proposes a DDR controller performance test platform based on FPGA and SD card. The platform utilizes the SD card as a storage medium to store the test stimuli, providing a flexible and convenient tool for the performance analysis and optimization of the DDR controller. The experimental results show that the designed test platform can accurately and effectively evaluate the performance of the DDR controller, and the test results can provide a valuable reference basis for the optimization and improvement of the DDR controller.

Shanghai University of Engineering Science (CN)
Affordable and clean energy
Openalex Percentile: Top 61%
Embedded Systems and FPGA Design
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