Hardware-based implementation of Intrusion Prevention System with OpenCTI

The paper is dedicated to analysing possible tools for cyber threat prevention with the combination of hardware accelerators to support this activity. Perspectives on using Intrusion Detection Systems (IDS) and Intrusion Prevention Systems (IPS) are discussed. The signature method and anomaly detection method are analysed. An analysis of hardware accelerators based on Field Programmable Gate Array (FPGA) is conducted. The use of Smart Network Interface Controller (NIC) is discussed. The set of the most popular Original Equipment Manufacturer (OEM) of FPGA-based SmartNICs is considered. The possibility of the use of Open Cyber Threat Intelligence (OpenCTI) platform is discussed. A system structure for preventing implementations of known cyber threats using the FPGA and OpenCTI framework is studied. A sequence of steps for creating hardware-accelerated solutions to prevent implementations using information from OpenCTI-based databases is proposed.