Memory-Efficient and Adaptive Heterogeneous Framework for Gate-Level Fault Simulation

Gate-level fault simulation is essential for automatic test pattern generation (ATPG). The traditional event-driven simulation is time-consuming due to the large number of faults. While parallel fault simulation with GPGPUs shows promise, it faces reduced parallel efficiency on large circuits. This is mainly due to the increased space required to store fault values, limiting the number of faults that can be processed in parallel and preventing full utilization of the GPU’s capabilities. In this study, we propose a memory-efficient fault machine implementation FM gpu based on a circular vector, which is tailored for GPU fault simulation with some sacrifices of time efficiency and a variable length limit. We also propose a fully adaptive parallel fault simulation framework based on the CPU-GPU heterogeneous system, which includes two stages on the GPU and performs CPU simulation at the same time. All parameters related to GPU memory optimization and workload balancing in the framework can be adjusted adaptively. The experimental results demonstrate that our method achieves better memory efficiency and speedup compared to the previous GPU fault simulation methods, a maximum speedup of 137.48× compared to the baseline open-source simulator with 32 threads, and a maximum speedup of 2.52× compared to a 32-thread commercial tool.