Dynamic Phase Current Compensation and DC-Link Voltage Ripple Mitigation Strategies for Three-Phase Neutral-Point-Clamped Grid-Tied Inverters Under Unbalanced Grid Voltages
This paper proposes dynamic phase current compensation and DC-link voltage mitigation strategies for three-phase four-wire neutral-point-clamped (NPC) grid-tied inverters under unbalanced grid voltages. When the grid fault occurs, the fault-phase voltage will diverge from its normal value. To achieve the reactive power compensation capability, the inverter should output reactive current on the fault phase. However, the unbalanced three-phase active/reactive power generates non-ideal harmonics and oscillations on the DC-link voltage, which might damage the DC-link capacitors. It is possible to increase the capacitance to suppress the ripple. However, the circuit size and cost will be increased. Therefore, this paper develops a dynamic phase current compensation (DPCC) strategy. This strategy will dynamically adjust the magnitude and phase angle of normal phase currents. Consequently, the harmonics and oscillations on the DC-link voltage can effectively be suppressed. The developed DPCC does not require additional circuits and components, and this strategy can be realized via the digital signal processor (DSP). Detailed theoretical analysis and mathematical derivations of the proposed strategy will be presented in this paper. Finally, a 5kVA prototype circuit with both computer simulations and hardware experiments demonstrates the performance and feasibility of the proposed DPCC. From the results, it can be confirmed that the maximum suppression rate of DC-link voltage ripple will be 83.17% with the proposed DPCC.
Authors
- Sen-Mao Liao
- Yun-Hsuan Lu
- Cheng-Yu Tang (ORCID: https://orcid.org/0000-0002-8075-9679)
- Zhenyu Xu (ORCID: https://orcid.org/0000-0001-8649-8062)
Institutions
- National Taipei University of Technology (TW)
- Delta Electronics (Taiwan) (TW)
Publication Details
- Journal
- IEEE Journal of Emerging and Selected Topics in Power Electronics
- Published
- 2025-08-20
- DOI
- https://doi.org/10.1109/jestpe.2025.3600623
- Primary Topic
- Multilevel Inverters and Converters
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Science and Technology Council