Fully Digital Current Control Techniques for Active Flying Capacitor Balancing in Three-Level Buck Converters

The challenge of balancing the flying capacitor (FC) voltage without sensing it remains a critical issue in multilevel FC converters. This paper proposes an automatic voltage balancing technique using digital current-mode control with emulating ramps and sampling the inductor valley current twice per switching cycle. Thereafter, a current error correction logic has been incorporated in an additional loop for faster FC voltage balancing. The slope requirement of the emulating ramp has been determined analytically from the steady-state stability analysis. The proposed technique works satisfactorily, even during the start-up process and various relevant transients that this converter may experience during the operation time. Along with simulation results, experimental case studies have endorsed the robustness of the proposed technique for a 48V to 12V, 200KHz laboratory hardware prototype.

Authors

Institutions

Publication Details

Published
2025-06-22
DOI
https://doi.org/10.1109/compel57166.2025.11121267
Primary Topic
Multilevel Inverters and Converters
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Fully Digital Current Control Techniques for Active Flying Capacitor Balancing in Three-Level Buck Converters

Anirban Nanda, Paolo Mattavelli, Arindam Maulik, Santanu Kapat et al.
Multilevel Inverters and Converters
article

Fully Digital Current Control Techniques for Active Flying Capacitor Balancing in Three-Level Buck Converters

Anirban Nanda, Paolo Mattavelli, Arindam Maulik, Santanu Kapat, Giovanni Bonnano
article en

Abstract

The challenge of balancing the flying capacitor (FC) voltage without sensing it remains a critical issue in multilevel FC converters. This paper proposes an automatic voltage balancing technique using digital current-mode control with emulating ramps and sampling the inductor valley current twice per switching cycle. Thereafter, a current error correction logic has been incorporated in an additional loop for faster FC voltage balancing. The slope requirement of the emulating ramp has been determined analytically from the steady-state stability analysis. The proposed technique works satisfactorily, even during the start-up process and various relevant transients that this converter may experience during the operation time. Along with simulation results, experimental case studies have endorsed the robustness of the proposed technique for a 48V to 12V, 200KHz laboratory hardware prototype.

University of Padua (IT), Indian Institute of Technology Kharagpur (IN)
Affordable and clean energy
Openalex Percentile: Top 80%
Multilevel Inverters and Converters
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.