An Evolutionary Algorithm Based Approach for Low-Power LDO Voltage Regulator Designs

In this paper, an evolutionary algorithm (EA)-based approach for the design of low-power low-drop-out (LDO) voltage regulators is advanced. The optimal performance of LDO regulators usually depends on many design parameters, such as quiescent current, maximum output current, maximum load capacitance, among others. Therefore, an EA flow that combines Python and NGSpice tools is proposed to achieve high-performance designs, employing circuit simulations to compute the algorithm’s cost function. A design example was carried out in the SkyWater 130 nm CMOS process and verified by post-layout simulation, whose results showed quiescent current of 465 nA, maximum load current of 10 μA and load capacitance of 5 pF.