Power Loss Modeling of GaN Bidirectional Switches in a Single-Branch Harmonically Partitioned Power Converter
The recently proposed Harmonically Partitioned Power Converter (HPPC) enables miniaturization and performance enhancement of single-phase ac/dc converters by achieving single-stage conversion, automatic unity power factor, complete power pulsation decoupling, and energy transfer through a high-frequency tank instead of a dc link. This work presents an analytical power loss model for the bidirectional switches (BDSs) used in a Class A-I single-branch HPPC, explicitly accounting for the asynchronous relationship between their conduction currents and blocking voltages. Dead time dynamics in the source-connected GaN BDSs under dual-gate synchronous control (DGSC) are modeled, and physical explanation of parasitic charging phenomena in both partial zero-voltage-switching (ZVS) and hard-switching scenarios is described. The loss model is validated against experimental results, estimating total losses within 10.4% of measured values and parasitic charging voltages of 4.0% and 11.0% discrepancy for partial ZVS transitions. The general hard-switched overcharging phenomenon is accurately predicted by the model.
Authors
- Jacob R. Anderson (ORCID: https://orcid.org/0000-0002-1179-717X)
- Mike K. Ranjram (ORCID: https://orcid.org/0000-0002-6513-1488)
Institutions
- Advanced Power Electronics (United States) (US)
- Arizona State University (US)
Publication Details
- Published
- 2025-06-22
- DOI
- https://doi.org/10.1109/compel57166.2025.11121268
- Primary Topic
- Silicon Carbide Semiconductor Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00