Toward Reliable Onboard AI in Space: A Fault-Tolerant Soft GPU-Based System-on-Chip

Artificial intelligence (AI) is becoming increasingly relevant for space applications, reducing reliance on high-bandwidth downlinks. Its use, however, has primarily been demonstrated in low Earth orbit (LEO) using commercial off-the-shelf (COTS) components. Extending its use to deep-space and long-duration missions requires computing platforms capable of operating in harsh radiation environments without incurring prohibitive costs. This is particularly important for systems implemented on field-programmable gate arrays (FPGAs), which are widely used in space applications due to their scalability and support for various radiation-hardening profiles. This flexibility makes them preferable to application-specific integrated circuits, whose low production volumes often do not justify their use in space systems. This article details our efforts to develop a novel system-on-chip (SoC) featuring GPU@SAT, a soft graphic processing unit IP provided by IngeniArs S.r.l., with a focus on enhancing its robustness when implemented on the Xilinx radiation-tolerant XQRKU060 FPGA. This approach leverages FPGA reconfigurability and radiation tolerance alongside the high-performance capabilities of graphic processing units (GPUs), unlocking significant potential for accelerating compute-intensive tasks in edge-space applications. Building on this foundation, we employ a classification-based methodology to improve the fault tolerance of GPU@SAT, analyzing trade-offs on performance, power, and area. Additional IP cores, such as a watchdog timer (WDT), a dual RISC-V lockstep with rollback, and the Xilinx Soft Error Mitigation IP, are employed to further improve the SoC robustness. Fault injection on an FPGA prototype targeting essential configuration bits validates the approach, showing a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$15.4\times $</tex-math> </inline-formula> improvement in mean injections before failure over the baseline architecture, with only a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.2\times $</tex-math> </inline-formula> increase in hardware complexity.