ACE-of-SPADEs: Accelerating Spatially Sparse Convolution for 3D Scene Understanding

Semantic understanding of 3D scenes is fundamental to many applications like robotics, autonomous driving, AR/VR. state-of-the-art methods for different 3D scene understanding tasks use 3D convolutional neural networks (CNNs) operating on point clouds. Convolution on spatially sparse data like point cloud involve irregular data accesses and compute patterns leading to poor utilization and energy efficiency in CPU/GPU implementations. The existing CNN accelerators designed for weight/activation sparsity cannot be efficiently repurposed for 3D spatially sparse CNNs given the fundamental differences in locating non-zero operands and granularity of work-dispatches. To address the dataflow challenges due to spatial sparsity and the need for specialized microarchitecture for spatially sparse convolution we present Ace-of-Spade s (AoS), an algorithm-dataflow-architecture co-designed system. AoS enables the data reuse among spatially proximate points using a locality-aware metadata structure along with a surface orientation aware point cloud reordering algorithm. AoS uses a novel technique for spatial sparsity aware selection of optimal data tiles by modelling the sparsity induced variations in the point cloud with a near-zero latency overheads. To accelerate computation on spatially sparse data, we propose a novel hardware accelerator Ss p nna with a front-end to convert varying number of operations per point into a stream of dense work dispatches to the backend compute engine. The compute engine further exploits weight and input feature data reuse through dynamic systolic grouping and multicast interconnects. The Ss p nna core together with the 64 KB of L1 memory requires 0.31 mm 2 of area in 10nm process at 1 GHz. Overall, AoS achieves speedup/energy savings of 19.9x / 49.9x and 2.2x / 7.1x over the state-of-the-art CPU and GPU implementations respectively.

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Publication Details

Journal
ACM Transactions on Embedded Computing Systems
Published
2025-08-19
DOI
https://doi.org/10.1145/3759457
Primary Topic
3D Shape Modeling and Analysis
Type
article
Field-Weighted Citation Impact
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article

ACE-of-SPADEs: Accelerating Spatially Sparse Convolution for 3D Scene Understanding

Abhilasha Devdatta Kulkarni, Anbang Yao, Om Ji Omer, Sreenivas Subramoney et al.
ACM Transactions on Embedded Computing Systems
3D Shape Modeling and Analysis
article

ACE-of-SPADEs: Accelerating Spatially Sparse Convolution for 3D Scene Understanding

Abhilasha Devdatta Kulkarni, Anbang Yao, Om Ji Omer, Sreenivas Subramoney, Prashant Laddha, Gurpreet S. Kalsi, Yurong Chen, K. C. S. Pillai, Anirudh Thyagharajan
article en

Abstract

Semantic understanding of 3D scenes is fundamental to many applications like robotics, autonomous driving, AR/VR. state-of-the-art methods for different 3D scene understanding tasks use 3D convolutional neural networks (CNNs) operating on point clouds. Convolution on spatially sparse data like point cloud involve irregular data accesses and compute patterns leading to poor utilization and energy efficiency in CPU/GPU implementations. The existing CNN accelerators designed for weight/activation sparsity cannot be efficiently repurposed for 3D spatially sparse CNNs given the fundamental differences in locating non-zero operands and granularity of work-dispatches. To address the dataflow challenges due to spatial sparsity and the need for specialized microarchitecture for spatially sparse convolution we present Ace-of-Spade s (AoS), an algorithm-dataflow-architecture co-designed system. AoS enables the data reuse among spatially proximate points using a locality-aware metadata structure along with a surface orientation aware point cloud reordering algorithm. AoS uses a novel technique for spatial sparsity aware selection of optimal data tiles by modelling the sparsity induced variations in the point cloud with a near-zero latency overheads. To accelerate computation on spatially sparse data, we propose a novel hardware accelerator Ss p nna with a front-end to convert varying number of operations per point into a stream of dense work dispatches to the backend compute engine. The compute engine further exploits weight and input feature data reuse through dynamic systolic grouping and multicast interconnects. The Ss p nna core together with the 64 KB of L1 memory requires 0.31 mm 2 of area in 10nm process at 1 GHz. Overall, AoS achieves speedup/energy savings of 19.9x / 49.9x and 2.2x / 7.1x over the state-of-the-art CPU and GPU implementations respectively.

ACM Transactions on Embedded Computing Systems
Intel (United States) (US), University of Wisconsin–Madison (US), Intel (India) (IN)
Openalex Percentile: Top 78%
3D Shape Modeling and Analysis
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