System Interfaces for Accurate READing from Memristive Devices in Multi-level ReRAM and Neuromorphic Computing Applications

This paper discusses the practical aspects of developing system interfaces for the reliable sensing of the analog resistive state of memristive devices, implementing multi-level resistive memory (ReRAM) cells or synaptic weights in neuromorphic computing applications. More specifically, it presents a general implementation method for ad-hoc sensing systems designed for memristive devices, with a particular focus on the design of the READ circuit module. Through detailed comparison and analysis of experimental results, this study proposes a versatile circuit that utilizes a current-to-voltage converting stage with a transimpedance amplifier (TIA), along with a suggested algorithm for iterative operation which will improve resolution, when needed, at the cost of longer READ processes. The proposed algorithm automatically adjusts the circuit parameters to maintain the output voltage of the TIA within an acceptable range, ensuring high-precision READings. This approach avoids saturation of the TIA while also preventing the low-level signals, which could compromise the precision of the READ process. Simulation results using LTSpice validate the operation and usefulness of the proposed circuit, enhancing the tutorial value of this work for both the practical implementation of research prototypes and more advanced applications of memristive devices developed by students, researchers, and engineers working in emerging device technologies.

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Publication Details

Journal
Parallel Processing Letters
Published
2025-08-18
DOI
https://doi.org/10.1142/s0129626425500112
Citations
2
Primary Topic
Advanced Memory and Neural Computing
Type
article
Field-Weighted Citation Impact
1.46

Funders

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article

System Interfaces for Accurate READing from Memristive Devices in Multi-level ReRAM and Neuromorphic Computing Applications

Ioannis Vourkas
2 citations
Parallel Processing Letters
Advanced Memory and Neural Computing
1.46
article

System Interfaces for Accurate READing from Memristive Devices in Multi-level ReRAM and Neuromorphic Computing Applications

Ioannis Vourkas
article en
2 citations

Abstract

This paper discusses the practical aspects of developing system interfaces for the reliable sensing of the analog resistive state of memristive devices, implementing multi-level resistive memory (ReRAM) cells or synaptic weights in neuromorphic computing applications. More specifically, it presents a general implementation method for ad-hoc sensing systems designed for memristive devices, with a particular focus on the design of the READ circuit module. Through detailed comparison and analysis of experimental results, this study proposes a versatile circuit that utilizes a current-to-voltage converting stage with a transimpedance amplifier (TIA), along with a suggested algorithm for iterative operation which will improve resolution, when needed, at the cost of longer READ processes. The proposed algorithm automatically adjusts the circuit parameters to maintain the output voltage of the TIA within an acceptable range, ensuring high-precision READings. This approach avoids saturation of the TIA while also preventing the low-level signals, which could compromise the precision of the READ process. Simulation results using LTSpice validate the operation and usefulness of the proposed circuit, enhancing the tutorial value of this work for both the practical implementation of research prototypes and more advanced applications of memristive devices developed by students, researchers, and engineers working in emerging device technologies.

Parallel Processing LettersVol. 35(03n04)
Democritus University of Thrace (GR), Federico Santa María Technical University (CL)
Agencia Nacional de Investigación y Desarrollo
Openalex Percentile: Top 16%
Advanced Memory and Neural Computing
1.46
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System Interfaces for Accurate READing from Memristive Devices in Multi-level ReRAM and Neuromorphic Computing Applications — Ioannis Vourkas · Parallel Processing Letters (2025) | TGRS Research Map | TGRS