Optical sample-and-hold for clock skew immunity in high-speed channel-interleaved photonic analog-to-digital converters

Precise clock synchronization dramatically increases the difficulty of designing large-scale and high-resolution channel-interleaved photonic analog-to-digital converters (PADCs). This paper presents what we believe to be a novel all-optical sample-and-hold method based on vector superposition. Closed-form equations are analyzed and derived to characterize the impact of various system parameters, including input frequency, bandwidth, and clock skew. To enable the optical sampling front end function as an optical sample-and-hold (S&H) circuit, sub-optical pulses with additional wavelengths are incorporated for the simultaneous acquisition of input signals. By precisely delaying and coherently coupling identical sampled information carried by these sub-optical pulses, discrete sampling points are effectively converted into continuous intervals, thereby significantly mitigating temporal errors caused by inter-channel clock skew and timing mismatches. The proposed method features the advantages of low complexity, low power consumption, and the ability to function over a wide frequency range. In the experiment, the proposed signal-holding mechanism inherently suppresses multi-channel temporal mismatches without sophisticated calibrations. The measurements of the configured channel-interleaved PADC demonstrate clock skew immunity within a ± 0.1 sampling period range while maintaining a spurious-free dynamic range (SFDR) above 60 dB.