FARRE: Fairness Aware Request Response Arbitration in Shared Caches

Contention in shared caches caused by concurrently executing applications can lead to overall performance degradation in multiprocessor systems-on-chip (MPSoCs). To address this issue, various shared cache arbitration techniques have been proposed to manage cache bandwidth contention. These techniques focus on enhancing overall system performance; however, this optimization often comes at the expense of system fairness, leading to some applications experiencing disproportionate slowdowns, or, in the worst case, starvation. Therefore, an effective shared cache bandwidth management policy is needed to optimize performance while ensuring fairness across applications. We propose FARRE , a novel fairness aware request-response arbitration technique for shared caches. FARRE is designed to optimize performance while attempting to maintain a user-defined fairness threshold. We evaluate its effectiveness through extensive simulations including comparisons against state-of-the-art arbitration schemes. The results show that FARRE is able to maintain or exceed the input fairness thresholds, and improves system performance over standard fair scheduling policies such as round-robin; the performance improvement is 14% for lower fairness thresholds such as 0.5, and could even gain 5% performance for aggressive thresholds such as 0.9. Additionally, compared to the best performance optimization techniques, FARRE achieves 81% higher fairness.

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Publication Details

Journal
ACM Transactions on Embedded Computing Systems
Published
2025-08-18
DOI
https://doi.org/10.1145/3761811
Primary Topic
Software-Defined Networks and 5G
Type
article
Field-Weighted Citation Impact
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article

FARRE: Fairness Aware Request Response Arbitration in Shared Caches

Preeti Ranjan Panda, Neetu Jindal, Priyanka Singla, Garima Modi et al.
ACM Transactions on Embedded Computing Systems
Software-Defined Networks and 5G
article

FARRE: Fairness Aware Request Response Arbitration in Shared Caches

Preeti Ranjan Panda, Neetu Jindal, Priyanka Singla, Garima Modi, Ayan Mandal
article en

Abstract

Contention in shared caches caused by concurrently executing applications can lead to overall performance degradation in multiprocessor systems-on-chip (MPSoCs). To address this issue, various shared cache arbitration techniques have been proposed to manage cache bandwidth contention. These techniques focus on enhancing overall system performance; however, this optimization often comes at the expense of system fairness, leading to some applications experiencing disproportionate slowdowns, or, in the worst case, starvation. Therefore, an effective shared cache bandwidth management policy is needed to optimize performance while ensuring fairness across applications. We propose FARRE , a novel fairness aware request-response arbitration technique for shared caches. FARRE is designed to optimize performance while attempting to maintain a user-defined fairness threshold. We evaluate its effectiveness through extensive simulations including comparisons against state-of-the-art arbitration schemes. The results show that FARRE is able to maintain or exceed the input fairness thresholds, and improves system performance over standard fair scheduling policies such as round-robin; the performance improvement is 14% for lower fairness thresholds such as 0.5, and could even gain 5% performance for aggressive thresholds such as 0.9. Additionally, compared to the best performance optimization techniques, FARRE achieves 81% higher fairness.

ACM Transactions on Embedded Computing SystemsVol. 24(5s)
Intel (United States) (US), Intel (India) (IN), Indian Institute of Technology Delhi (IN)
Openalex Percentile: Top 77%
Software-Defined Networks and 5G
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FARRE: Fairness Aware Request Response Arbitration in Shared Caches — Preeti Ranjan Panda, Neetu Jindal, et al. · ACM Transactions on Embedded Computing Systems (2025) | TGRS Research Map | TGRS