P4sim: Simulating Programmable Switches in ns-3

Programming Protocol-Independent Packet Processors (P4) has enabled network researchers to program packet processing pipelines to prototype and implement novel network functions in hardware and software testbeds.P4 support in simulators, like network simulator version 3 (ns-3) can benefit significantly from ns-3's featurerich ecosystem.However, existing P4 simulators have poor scalability, inaccurate timing, and limited architectural support.This paper introduces P4sim, a high-performance simulator developed on top of ns-3.P4sim enhances queue modeling and packet scheduling, ensuring efficient packet processing and precise simulation time representation.The evaluation results confirm that P4sim effectively manages packet processing, supporting data rates up to 10 Gbps.Furthermore, P4sim supports various architectures, like V1Model, Portable Switch Architecture (PSA), and Portable NIC Architecture (PNA).It enables seamless transition between Behavioral Model version 2 (bmv2) and P4sim, allowing researchers to shift from rapid prototyping to large-scale network simulations with the same P4 code.