HBMalloc: Dynamic Memory Management in High-Level Synthesis for FPGA HBM
Field programmable gate array (FPGA) boards equipped with high bandwidth memory (HBM) allow users to exploit the remarkable external memory bandwidth. Nonetheless, it may not be an easy task to optimize the memory usage, while fully utilizing the available HBM bandwidth. Dynamic memory management (DMM) in High-level Synthesis (HLS) has been introduced as a promising solution to achieve high memory usage at low design cost. However, existing DMM solutions only focus on BRAMs or DDR memories, lacking enough support for HBMs. To address these challenges, we propose HBMalloc, a source-to-source framework that supports both automatic HLS code transformation and systematic hardware generation. Experimental results show that the proposed allocators can achieve an average of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$2 \times$</tex> higher HBM bandwidth than prior works. Our pointer partition strategy can explore the parallelism and bring about a significant speedup in diverse memory-bounded applications.
Authors
- Lingli Wang (ORCID: https://orcid.org/0000-0002-0579-3527)
- Yaochu Jin (ORCID: https://orcid.org/0000-0003-1100-0631)
- Yiqing Mao (ORCID: https://orcid.org/0009-0005-9167-2279)
- Wai-Shing Luk (ORCID: https://orcid.org/0009-0006-8322-8079)
Institutions
- Fudan University (CN)
- State Key Laboratory of ASIC and System
Publication Details
- Published
- 2024-12-10
- DOI
- https://doi.org/10.1109/icfpt64416.2024.11113399
- Primary Topic
- Embedded Systems Design Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00