A Table Look-Up Based Quantum Simulation Accelerator on an FPGA
In quantum computing simulation, efficient data representation is essential since a naive data representation can strain memory bandwidth and limit parallelism. This paper presents a new data representation, base- <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\frac{1}{\sqrt{2}}$</tex> numeral system, to implement fast quantum computing simulation on FPGAs. The results show that our accelerator is the fastest simulator among CPU, GPU, and FPGA-based ones, providing a valuable tool for researchers developing and testing quantum algorithms.
Authors
- Masayuki Shimoda (ORCID: https://orcid.org/0000-0003-4627-0957)
- Hidehiko Hasegawa (ORCID: https://orcid.org/0000-0002-7383-6277)
- Hiroki Nakahara (ORCID: https://orcid.org/0000-0002-5701-7466)
- Takefumi Miyoshi (ORCID: https://orcid.org/0009-0009-0536-9644)
Institutions
- Tokyo Institute of Technology (JP)
- Tohoku University (JP)
Publication Details
- Published
- 2024-12-10
- DOI
- https://doi.org/10.1109/icfpt64416.2024.11113474
- Primary Topic
- Quantum Computing Algorithms and Architecture
- Type
- article
- Field-Weighted Citation Impact
- 0.00