Design and Validation of a 100 kHz Inner-Paralleled Si+SiC Hybrid Multilevel Converter for Medium-Voltage Electric Traction Drives

In this paper, a novel medium-voltage (MV) hybrid multilevel inverter with an inner-paralleled (IP) half-bridge (HB) is designed and developed for electric traction drives with a 3-kV dc bus. Within this proposed hybrid configuration, each phase consists of an active-neutral-point-clamped (ANPC) three-level (3-L) cell that adopts 3.3-kV silicon (Si) IGBTs operating at a fundamental frequency, while the IP cell using a custom 3.3-kV H-bridge silicon carbide (SiC) MOSFET operates at a frequency of 50 kHz. With interleaving through line inductors, the output apparent switching frequency has been doubled, e.g. 100 kHz. The comprehensive design and demonstration of the full-scale prototype are introduced, including low-inductance laminated busbar architecture optimization, H-bridge power electronics building block (PEBB) design, modular system integration, and proprietary modulation and controls. Extensive simulation and experimental results are presented to validate the overall performance of the studied prototype systems in steady and dynamic states. The findings show that in contrast to existing all-Si or SiC-based 3-L and five-level (5-L) ANPC, the proposed new 5-L Si+SiC converter is characterized by higher power efficiency and density, better harmonics properties, higher dc bus voltage, lower dv/dt, and build cost, which provides a promising electrified solution for MV traction drives in the transportation sector.