Booth-Assisted Mixed-Precision Reconfigurable Digital Computing-in-Memory Engine With Ternary-Input 1T2R ReRAM for Edge AI

ReRAM has emerged as a promising candidate for computing-in-memory due to its excellent compatibility with advanced CMOS processes, high density, and non-volatility. Meanwhile, Digital Computing-in-Memory (DCIM) offers higher energy efficiency than its analog counterpart and supports full-precision processing. However, existing ReRAM-based DCIMs are hindered by error-prone readout and low input parallelism. The inefficient bit-width reconfiguration also incurs significant hardware overhead during neural network mapping. This paper reports a 64Kb DCIM engine based on 1T2R ReRAM bitcells for multiply-and-Accumulate(MAC) acceleration. The ternary-input Booth-assisted multiply-in-memory (TB-MIM) flow allows bi-state ReRAM with limited readout margin to achieve high-accuracy computation with high parallelism. The corresponding reconfigurable vector adder-tree and accumulator (ReV-A<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>) effectively facilitate practical hybrid-precision network mapping. Simulations show that the proposed DCIM engine achieves a normalized throughput rate of 284.44 GOPS/Kb and an energy efficiency of 730.16 TOPS/W, surpassing previous ReRAM-based DCIM designs by <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3.3\times $</tex-math> </inline-formula>.