A 115.6–156.1-GHz Wideband Low-Noise Amplifier in 65-nm CMOS Technology

This letter presents a <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</i>-band wideband low-noise amplifier (LNA) fabricated in a 65-nm CMOS technology. The LNA employs a five-stage pseudo-differential common-source topology, along with a staggered matching technique with low-coupling-coefficient (low-<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">k</i>) transformers. To mitigate gain and phase imbalance as well as to reduce the noise figure (NF) and its in-band fluctuations, a transformer-based input matching network with zero-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega $</tex-math> </inline-formula> transmission line (ZTL) is introduced. As a result, the LNA achieves a peak gain of 18.0 dB, a 3-dB bandwidth (BW) of 40.5 GHz (115.6–156.1 GHz), and an NF down to 5.74 dB over its BW. NF was measured by three different methods, which showed consistent results across the 3-dB BW. The measured IP<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1dB</sub> is −16.1 dBm at 140 GHz, and the LNA dissipates a total dc power of 33 mW with a 1-V supply.