A 57.2 nW, 1.3–5 V <i>V</i> <sub>IN</sub> , –85 dB PSRR, 50 μs Start-Up Time, Bandgap Reference Circuit
This article presents a low-power bandgap reference (BGR) featuring high power supply rejection ratio (PSRR) and fast start-up capability, operating across a wide supply voltage range of 1.3–5 V. A novel prebiased pulse current injection technique is proposed in the start-up circuit, achieving a 1% settling time of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$50~\mu $</tex-math> </inline-formula>s and a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$25\times $</tex-math> </inline-formula> speed gain during start-up. To enhance supply noise immunity, the proposed BGR employs a preregulated (PR)-based amplifier that effectively decouples the reference voltage from supply voltage fluctuations. Fabricated in a 0.18-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>m BCD process, the proposed reference occupies an active area of 0.0394 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. Under a 5 V supply, the circuit generates a 1.2 V reference voltage while consuming only 48 nA quiescent current. Operating down to a minimum supply voltage of 1.3 V, it maintains a low power consumption of 57.2 nW at room temperature. The reference exhibits an average temperature coefficient (TC) of 5.95 ppm/°C across a wide temperature range (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$- 40~^{\circ }$</tex-math> </inline-formula>C to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$125~^{\circ }$</tex-math> </inline-formula>C) and achieves an outstanding line sensitivity (LS) of 0.00308%/V over the 1.3–5 V supply range. Furthermore, the measured PSRR reaches −85 dB at 100 Hz.
Authors
- Libo Qian (ORCID: https://orcid.org/0000-0002-7593-6730)
- Zhangming Zhu (ORCID: https://orcid.org/0000-0002-7764-1928)
- Yani Li
- Zonghui Li (ORCID: https://orcid.org/0000-0002-7835-498X)
Institutions
- Xidian University (CN)
Publication Details
- Journal
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Published
- 2025-08-18
- DOI
- https://doi.org/10.1109/tvlsi.2025.3596098
- Citations
- 1
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.67
Funders
- National Natural Science Foundation of China
- Key Research and Development Program of Ningxia
- Natural Science Foundation of Zhejiang Province