A 900-MHz low-power receiver with preamble-based frequency estimation algorithm for ambient IoT

This paper presents a 900-MHz low-power low-IF receiver for narrowband Ambient Internet of Things (A-IoT). To reduce the power consumption of the clock generation module, a free-running ring oscillator (RO) is employed. To mitigate the impact of RO initial frequency drift on sensitivity, a preamble-based frequency estimation (PBFE) algorithm is proposed. To suppress image interference, a passive mixer based on a Gm-C cell is implemented on-chip. Designed in 55-nm CMOS process, post-layout simulation results show that the proposed receiver achieves a link gain of 80-dB and a noise figure of 9.8-dB at 1-MHz IF. For a 90-kbps on-off keying (OOK) signal, the receiver demonstrates a sensitivity of -93-dBm and an image rejection ratio of 7.5-dB. The prototype operates at 1.2-V supply and consumes a total power of 580-μW. The model verification based on chip simulation results verifies that the PBFE algorithm improves sensitivity by 6-dB.

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Publication Details

Journal
IEICE Electronics Express
Published
2025-08-18
DOI
https://doi.org/10.1587/elex.22.20250452
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
Field-Weighted Citation Impact
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article

A 900-MHz low-power receiver with preamble-based frequency estimation algorithm for ambient IoT

Min Hao, Rui Guo, Jin Sun, Jintian Li et al.
IEICE Electronics Express
Radio Frequency Integrated Circuit Design
article

A 900-MHz low-power receiver with preamble-based frequency estimation algorithm for ambient IoT

Min Hao, Rui Guo, Jin Sun, Jintian Li, Meng Liu
article en

Abstract

This paper presents a 900-MHz low-power low-IF receiver for narrowband Ambient Internet of Things (A-IoT). To reduce the power consumption of the clock generation module, a free-running ring oscillator (RO) is employed. To mitigate the impact of RO initial frequency drift on sensitivity, a preamble-based frequency estimation (PBFE) algorithm is proposed. To suppress image interference, a passive mixer based on a Gm-C cell is implemented on-chip. Designed in 55-nm CMOS process, post-layout simulation results show that the proposed receiver achieves a link gain of 80-dB and a noise figure of 9.8-dB at 1-MHz IF. For a 90-kbps on-off keying (OOK) signal, the receiver demonstrates a sensitivity of -93-dBm and an image rejection ratio of 7.5-dB. The prototype operates at 1.2-V supply and consumes a total power of 580-μW. The model verification based on chip simulation results verifies that the PBFE algorithm improves sensitivity by 6-dB.

IEICE Electronics ExpressVol. 22(19)
Fudan University (CN)
Affordable and clean energy
Openalex Percentile: Top 81%
Radio Frequency Integrated Circuit Design
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