Fracture dynamics in Smart Cut™ technology: Wafer deformation measurement
• Solar cell implemented with PIN diode controlling the depletion region by a MOS capacitor placed over its intrinsic region (substrate). • Solar cell implemented with two different layout styles (rectangular and half-circular). • Solar cell implemented with half-circular layout style and PIN diode is an alternative to improve its electrical performance. High-Speed Cameras help in characterizing the splitting step in the Smart Cut™ technology. Full wafer-scale deformation monitoring upon annealing is then possible. This paper describes the setup, equipment and methodology used to estimate the backside wafer deformation and curvature upon fracture propagation in situ during the fracture step. Finally, with such a setup, the fracture process of a SOI-ready structure is studied dynamically over the whole propagation time scale. These results are consistent with literature work performed using punctual measurements methods and will allow in the future to emphasize the effect of process’ and structure’s geometry.
Authors
- F. Rieutord (ORCID: https://orcid.org/0000-0003-4697-3652)
- Lucas Colonel (ORCID: https://orcid.org/0000-0002-6483-7358)
- Didier Landru (ORCID: https://orcid.org/0000-0001-8993-0973)
- Kevin Blanco
- Samuel Tardif (ORCID: https://orcid.org/0000-0002-1786-8581)
- F. Mazen (ORCID: https://orcid.org/0000-0001-6821-7191)
- J. Eymery (ORCID: https://orcid.org/0000-0002-4216-1166)
- Pablo Eduardo ACOSTA ALBA
Institutions
- Soitec (France) (FR)
- Commissariat à l'Énergie Atomique et aux Énergies Alternatives (FR)
- CEA Grenoble (FR)
- Laboratoire d'Électronique des Technologies de l'Information (FR)
- Université Grenoble Alpes (FR)
Publication Details
- Journal
- Solid-State Electronics
- Published
- 2025-08-18
- DOI
- https://doi.org/10.1016/j.sse.2025.109218
- Primary Topic
- Advanced Surface Polishing Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00