Multi-level Vertical III-V Nanowire Gate-All-Around Ferroelectric FETs for In-Memory Computing
Hafnia-based ferroelectric Field-Effect Transistors (FeFETs) are promising candidates for non-volatile memory and neuromorphic computing due to their fast switching, low power consumption, and CMOS compatibility [1]–[3]. IIIV materials, such as InAs, offer superior electron transport properties [4], [5], and high remnant polarization at low annealing temperatures when integrated with hafnia-based ferroelectrics [6], [7]. This work uses retention measurements to explore the multi-level characterization of an InAs vertical nanowire gate-all-around FeFET (VNW GAA FeFET). The VNW GAA architecture is promising for increased scalability [8], [9], while the multi-level switching behavior of FeFETs enhances their utility in in-memory computing and neuromorphic applications [10]. This study advances III-V FeFET technology by demonstrating 100 s long multi-level switching, which is important for next-generation memory and AI hardware.
Authors
- Zhongyunshen Zhu (ORCID: https://orcid.org/0000-0002-7588-4088)
- Mamidala Karthik Ram (ORCID: https://orcid.org/0000-0001-9512-1064)
- Lars-Erik Wernersson
Institutions
- Lund University (SE)
Publication Details
- Published
- 2025-06-22
- DOI
- https://doi.org/10.1109/drc66027.2025.11105745
- Citations
- 1
- Primary Topic
- Ferroelectric and Negative Capacitance Devices
- Type
- article
- Field-Weighted Citation Impact
- 0.73