Comparative Analysis and Performance Enhancement of Silicon Based VNWTFET for Low Power Applications

This study presents the vertical nanowire TFET structure. Using the 3D Silvaco TCAD tool, the DC performance analysis of both devices, NWFET and VNWTFET, is investigated. The suggested device has a steeper characteristic, is developed to lower the leakage current while preserving a high ION/IOFF ratio, which enables low power application. With the OFF current (Ioff) reduced to the order of 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-18</sup> A/μm and achieving a lower point sub-threshold slope of 16 mV/decade with high ON current (Ion) order of 2.13 μA, the proposed device has produced a substantially satisfying result.