Endurance Enhancement in Low Operating Voltage Scavenged SOI FEFETs

HfO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>-based FEFETs, due to their low power consumption, high speed operation, and excellent scalability, have emerged as promising candidates for memory applications ranging from embedded SRAM to vNAND [1, 2]. However, high switching voltage and low endurance hinder their technological adoption. In the past, gate stack, IL and channel engineering have been explored for lowering the operating voltage and improving endurance [3-6]. This work utilizes oxygen scavenging to reduce the switching voltage by reducing the IL thickness, in combination with a SOI substrate to improve the endurance of the FEFETs. Therefore, this paper presents a comparative study of the electrical characteristics of scavenged FEFETs fabricated on SOI and Si substrates and demonstrates the superior endurance (1000x improvement) and switching voltage ˜ 40 % reduction) characteristics of scavenged FEFETs on SOI substrates.