Overcoming Mobility-Stability Trade-off by Gate Stack Engineering in BEOL Compatible Ga Doped In<sub>2</sub>O<sub>3</sub> MOSFETs
Indium oxide (In<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>O<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf>)-based thin-film transistors (TFTs) exhibit a trade-off between carrier mobility and device reliability. This arises because oxygen vacancies ($\mathrm{V}_{\mathrm{O}}$) act as shallow donors that boost carrier concentrations and set the Fermi level above the mobility edge, but their propensity to form under bias and temperature stress compromises reliability [1]. To suppress $\mathrm{V}_{\mathrm{o}}$ formation, cations featuring high metal-oxygen bonddissociation energies (M-O BDE), such as tungsten [2–4] gallium [5], are often employed; however, achieving effective suppression requires substantial doping. Such high doping levels significantly degrade the intrinsic high mobility of In<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>O<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> by enhancing electron scattering. In this study, the inherent tradeoff between mobility and threshold voltage stability is mitigated (Fig1. (a-c)) by using engineered gate stacks composed of HfO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> and Al<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>O<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> in a hybrid configuration. These gate stacks are integrated into back-gated (BG) gallium-doped In<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>O<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> MOSFET test vehicles and displayed smaller threshold voltage shifts ($\Delta \mathrm{V}_{\mathrm{T}}$) under both positive and negative bias stress (PBS and NBS) relative to conventional devices employing HfO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>-only gate stacks.
Authors
- Hyeonwoo Park (ORCID: https://orcid.org/0000-0003-2562-4656)
- Eknath Sarkar (ORCID: https://orcid.org/0000-0001-7541-2729)
- Suman Datta (ORCID: https://orcid.org/0000-0001-6044-5173)
- Dyutimoy Chakraborty (ORCID: https://orcid.org/0000-0003-1581-9564)
- Asif Islam Khan (ORCID: https://orcid.org/0000-0003-4369-106X)
- Mengkun Tian (ORCID: https://orcid.org/0000-0003-2790-7799)
- Hyun Jae Lee (ORCID: https://orcid.org/0000-0001-5017-2853)
- Chengyang Zhang (ORCID: https://orcid.org/0009-0000-6303-1080)
- Emmanuel Quezada
Institutions
- Georgia Institute of Technology (US)
Publication Details
- Published
- 2025-06-22
- DOI
- https://doi.org/10.1109/drc66027.2025.11105741
- Primary Topic
- ZnO doping and properties
- Type
- article
- Field-Weighted Citation Impact
- 0.00